1. Field
Exemplary embodiments of the present invention relate to a semiconductor system, and more particularly, to a technology for refreshing stored data.
2. Description of the Related Art
A memory cell within a volatile memory device, such as a DRAM, includes a transistor serving as an access element and a capacitor serving as a storage element. According to whether or not a charge is stored in the capacitor of the memory cell, that is, according to whether the terminal voltage of the capacitor is high or low, data is divided into ‘high’ (logic 1) and ‘low’ (logic 0).
Since data are retained in such a form that charges are accumulated, no power is theoretically consumed. However, since the initial charge stored in the capacitor disappears due to leakage current caused by a PN junction of a MOS transistor or the like, the data may be lost. In order to prevent the data loss, the data stored in the memory cell must be read before the data are lost, and the memory cell must be normally recharged according to the read information. Such an operation must be periodically performed to retain the data. Such an operation of recharging the memory cell is referred to as a refresh operation.
The refresh operation is divided into an auto refresh operation and a self refresh operation. The auto refresh operation refers to a refresh operation, which is performed whenever an auto refresh command is applied to a memory from a memory controller. The memory controller applies an auto refresh operation to the memory at each predetermined time in consideration of a data retention time of the memory. For example, when the data retention time of the memory is 64 ms and 8,000 refresh commands are to be applied to refresh the entire memory cells of the memory, the memory controller applies 8,000 or more auto refresh commands for 64 ms. The self refresh operation refers to a refresh operation, which the memory performs by itself when the memory controller commands the memory to enter the self refresh mode. During the self refresh mode, the memory repeats a refresh operation at each predetermined period by itself. Since data are rewritten to a large number of memory cells during the refresh operation, a large amount of current is consumed regardless of whether the refresh operation is the auto refresh operation or the self fresh operation.
Recently, the need for a memory that is capable of storing a large amount of data or processing a large amount of data in a short time has been increasing. Thus, a semiconductor device is fabricated according to a method of stacking a plurality of memory chips in one semiconductor package. When the plurality of memory chips stacked in one semiconductor package perform refresh operations at the same time, a huge amount of current may be consumed. There is a demand for a technique capable of alleviating such a concern.